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Benno
Netherlands
79 Posts |
 Posted - 04 Mar 2010 : 23:00:23
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Hi,
I am creating my first full SMD board and need Fiducials. The help file only mentions Fiducials in the checklist :(.
How can I create a Fiducial?
How do I take care it is not covered by soldermask?
Is there an advice regarding size of the Fiducial?
Thanks for your help. |
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Iain Wilkie
United Kingdom
1015 Posts |
Posted - 05 Mar 2010 : 08:14:16
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Most fudicials I come across are simply pads.
Iain |
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Peter Johnson
United Kingdom
499 Posts |
Posted - 05 Mar 2010 : 13:08:29
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One of the best ways of creating fiducials is to place two square all layer pads so their corners touch, checkerboard fashion. That means that regardless of the degree of over or under etching, optics can find the intended datum line. Unfortunately on silk layers you need to add filled shapes to do this. Keep the line width fairly thin to reduce the radiussing of the corners.
Some manufacturers require increased resist clearance for fiducials. If yours is one of these, see the FAQ on creating custom pad shapes to find out how to create custom resist layers. |
Edited by - Peter Johnson on 05 Mar 2010 13:09:13 |
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Benno
Netherlands
79 Posts |
Posted - 07 Mar 2010 : 20:26:35
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Peter,
When I add a Filled shape on a copper layer, how can I prevent it from getting solder resist on top of it? |
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Iain Wilkie
United Kingdom
1015 Posts |
Posted - 08 Mar 2010 : 08:38:27
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If its a pad it will appear on the resist mask. If you want to increase or decrease the resist clearance for only this then create a pad exception on the resist mask layer.
Iain |
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Benno
Netherlands
79 Posts |
Posted - 08 Mar 2010 : 11:43:12
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quote:
create a pad exception on the resist mask layer.
Can I do this easy, or do I need to follow the route Peter suggested using the modified technology file? |
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Iain Wilkie
United Kingdom
1015 Posts |
Posted - 08 Mar 2010 : 13:57:53
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Go to the Pads list in the design technology and select the pad style in question and create an exception on the resist layers.
Please note you only need to do this if you require a different resist aperture than normal
Iain |
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TheBFG
United Kingdom
61 Posts |
Posted - 11 Oct 2010 : 13:47:57
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I need to make a fiducial which has soldermask exclusion for 2mm around the fiducial, but have not been successful at following what is talked about here, I have "Solder Mask" layer in Design Technology, but I cannot put the shape I have created into the layer. Can anyone give a step by step guide?
Thanks a lot |
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TheBFG
United Kingdom
61 Posts |
Posted - 12 Oct 2010 : 10:59:00
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I've created the fiducial (as a component). (I prefer all my mounting holes etc, etc to be present on the schematic).
I had to go into design technology and add the two solder mask layers. Solder mask existed in layer types but not in layers. Now I can add a filled circle as type solder mask. It all works nicely - the gerbers contain the enlarged mask where I need it on the fiducial and the rest of the components have a slightly larger mask than pad, just as before I added the extra layers.
However when I check the gerbers there exists solder paste on top of the fiducial. How do I stop the solder paste being applied to the fiducial? |
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edrees
United Kingdom
779 Posts |
Posted - 12 Oct 2010 : 14:59:19
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| Think the best way is to use a free pad rather than a single pad component. This way you can make an exception for the free pad/solder paste pads-only setup during the Gerber output creation process, such that solder paste is only on (surface,non-drilled) component pads. Hope this helps. |
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Peter Johnson
United Kingdom
499 Posts |
Posted - 12 Oct 2010 : 16:45:58
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| You can still add pad exceptions for specific layers to pads in components. Just make sure it's defined in the pad style table in the usual way. You can even make it design specific if you wish, as long as you've checked which style name is used in the component first! |
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exatech
Netherlands
18 Posts |
Posted - 07 Jan 2011 : 09:29:04
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| the amount of work to add a few fiducials to a design is astonishing: custom pads with intricate exceptions, separate plot settings for the solder resist mask, separate layer for the solder paste mask, separate plot settings for this layer, high cost if an error is made....... please Number One, add fiducials as a standard feature to EPC. |
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Iain Wilkie
United Kingdom
1015 Posts |
Posted - 07 Jan 2011 : 10:01:09
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quote:
Originally posted by exatech
the amount of work to add a few fiducials to a design is astonishing: custom pads with intricate exceptions, separate plot settings for the solder resist mask, separate layer for the solder paste mask, separate plot settings for this layer, high cost if an error is made....... please Number One, add fiducials as a standard feature to EPC.
I use resist and paste layers as a default on all design (setup in technology file). That way its so easy to alter the things you are talking about. It also means you can view these layers to make sure they look correct without having to view them as gerber files.
Iain
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exatech
Netherlands
18 Posts |
Posted - 07 Jan 2011 : 10:51:06
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Hi Iain,
thanks for your reply.
I just spend the entire morning adding just 2 fiducials to an existing design that did not have these layers. Surely you can do better than that, and make it easier for us poor Easy PC designers. |
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Iain Wilkie
United Kingdom
1015 Posts |
Posted - 07 Jan 2011 : 10:56:22
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How can I make it easier ? .... I am a user !
Iain
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edrees
United Kingdom
779 Posts |
Posted - 10 Jan 2011 : 18:20:11
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Iain, despite you stating ,-
"I use resist and paste layers as a default on all design (setup in technology file). That way its so easy to alter the things you are talking about. It also means you can view these layers to make sure they look correct without having to view them as gerber files."
there are so many ways in which to achieve screwed up Gerber plots with the EPC Gerber plot utility (switches/layers/pads only/settings etc) it's always best to view them with a 3rd party Viewer before shipping them off to your PC supplier. Seeing them on the pcb editor doesn't necessarily mean that the Gerber utility will plot them as you intended. Implementing Fiducials are really a pain in EPC.
I do think that there are too many instances where a particular setting can be over-riden in another aspect of the program.
However, if we need the flexibility to do weird and wonderful "exceptions" we must accept the downsides too! |
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Iain Wilkie
United Kingdom
1015 Posts |
Posted - 10 Jan 2011 : 18:41:09
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We always view the gerbers in a third party viewer on completion, all I was meaning is if you setup paste and resist layers by default you can see these layers in the design ... whereas you cannot if you use the automatically generated layers at the gerber output. Sometimes you will want pads that are clear of resist but no paste... eg an edge connector finger, having these layers in the design allows you to "see" this even before you output your gerbers.
The pad exception is a really powerful utility once you know how to use it.
Iain
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AHagedoorn
Netherlands
5 Posts |
Posted - 23 Jan 2011 : 00:34:35
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Hi All,
I am using fiducials on my board for the first time. Using separate layers for paste and solder mask and pad exceptions. Works fine but now I need a fiducial in poured copper with an exception in the space between fiducial and the copper. As far as I can see it is not possible to define such an exception in EPC. Or is there a little trick to do the job?
Thanks in advance!
Arend |
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Iain Wilkie
United Kingdom
1015 Posts |
Posted - 23 Jan 2011 : 12:07:39
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Not quite sure what you mean ... If the "exception" is on the paste or resist maskes, then simply edit the layer accordingly by creating your "exception" shape on the layer.
Iain
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AHagedoorn
Netherlands
5 Posts |
Posted - 23 Jan 2011 : 21:20:42
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Hi Iain,
Thank you for reply.
I meant an exception on the copper (bottom) layer. On that layer I have a fiducial in a poured copper shape. For this fiducial I need a different (larger) spacing than the overall one defined in "pads to shapes" from the "Design Technology/Spacings" tab. With the overall spacing copper of the poured copper shape will show "naked" due to the exception defined for the resist layer.
Fiducial Pad Style settings: All 1mm; Resist 3mm; Paste 0 mm.
For now I created a workaround by defining a circular cutout in the poured copper shape of 3 mm on top of the fiducial.
Arend |
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Iain Wilkie
United Kingdom
1015 Posts |
Posted - 24 Jan 2011 : 09:45:32
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What you could also do is give the fudicial a net name, then in the "nets" dialogue add a "guard" spacing ... this will increase the clearance of the poured copper round the fudicial.
Iain
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Edited by - Iain Wilkie on 24 Jan 2011 09:54:57 |
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AHagedoorn
Netherlands
5 Posts |
Posted - 25 Jan 2011 : 08:32:07
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Hi Iain,
I have tried your suggestion and it works fine. Each fiducial has now its own net name. Less nice is that I will have a “Single pin net” error with the DRC check and a “Net x contains a single pin” warning with the Connectivity Check. Of course I can accept the errors in the DRC or do you know another smart way to prevent these “errors”?
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Iain Wilkie
United Kingdom
1015 Posts |
Posted - 25 Jan 2011 : 10:43:39
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Well in essence it is a single pin net and is warning you about it. As you are aware that it is ok, then accepting it is the usual thing to do.
It would be wrong for DRC to ignore this as it is only the designer that can decide if it is correct or not.
Iain
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Edited by - Iain Wilkie on 25 Jan 2011 23:18:24 |
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AHagedoorn
Netherlands
5 Posts |
Posted - 26 Jan 2011 : 22:31:24
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Hi Iain,
Of course you are right with the DRC not ignoring these errors. I like the solution you suggested and will continue to use it. Thank you for thinking along.
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Topic |
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Fiducial