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Chris55000
United Kingdom
38 Posts |
 Posted - 10 Jan 2023 : 20:04:09
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Hi!
I'm trying to create this power supply rectifier PCB that was originally imported from an Eagle design, then modified to suit my personal Design Technology files.
I am trying to pour Copper Areas to provide psuedo-ground planes between the high-current rectifiers and their reservoir capacitors, and I keep getting Thermal Relief Frrors in DRC because different nets that are supposed to be separate keep connecting together somehow!
The main high-current smoothing capacitors have nets desiginated "+UB1, +UB2, -UB1 and -UB2", if I name the positive sides of the capacitors C1 and C2 as +UB1, and then try to name the positive sides pf C3 and C4 as "+UB2" the positive sides of C1 and C2 change to "+UB2" with them!
This causes thermal relief errors because the pads on C3 and CON3 don't register with the proper connections!
Anyone got any ideas please?
This forum has no means of attaching files or screenshots, so I've added One Drive Links to my Design File and Screenshot for Members to look at!
Screenshot :-
https://1drv.ms/u/s!Am_MC4C6UdcNiL4E-Ytn18Lg4Exutg?e=k3n18t
Design File :-
https://1drv.ms/u/s!Am_MC4C6UdcNiL4FRWWBXICp-29yEg?e=lpOIOE
This file is not in any way confidential in nature as it is for a personal PSU project!
Incidentially I had exactly the same errors with a Z80 Microcontroller PCB I designed for my friend and I ended up having to completely redraw the schematic from scratch again before I could get rid of the faults! Is this a known bug?
Software V24.0.5.
Chris Williams |
Edited by - Chris55000 on 10 Jan 2023 20:20:35 |
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edrees
United Kingdom
781 Posts |
Posted - 11 Jan 2023 : 10:26:59
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It appears that you may have imported an Eagle netlist, then modified the pcb such that the pcb nets no longer agree with the original netlist. Also, what Eagle thinks is pin1 (say Cap+) may not "map" into your EasyPC component where Cap+ may be defined as pin2.
If you select one of the 4 left hand capacitor pins and "Highlight Net" you will find that the netlist says that 7 out of 8 capacitor pins are all connected together! Renaming your nets implies that all component pins on that net gets renamed, so you have renamed the "left" hand side of a netlist, the "right " hand side will also be renamed. If you look closely at the pcb layout, you will see (default yellow) "elastic bands" showing what the netlist says is connected. If you delete the elastic bands then you will update the pcb netlist.
The DRC is doing what it is designed to do. You do not have a "reference" EasyPC schematic from which a new updated netlist can be created which would match your EasyPC pcb layout, so this is NOT a bug.
You could view the netlist in Output=>Netlist (creates a txt file) where you will see the misconnected nets. |
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Unwanted Net Connections and Thermal Relief Errors