All Forums  Help For Easy-PC Users  PCB Layout  Technology Spacings - New Request

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Screensize: 640 x 480 800 x 600 1024 x 768 1280 x 1024 UserName: Password: Format Mode: Basic  Help  Prompt  Format: Font Andale Mono Arial Arial Black Book Antiqua Century Gothic Comic Sans MS Courier New Georgia Impact Lucida Console Script MT Bold Stencil Tahoma Times New Roman Trebuchet MS Verdana   Size 1 2 3 4 5 6   Color Black Red Yellow Pink Green Orange Purple Blue Beige Brown Teal Navy Maroon LimeGreen Message: * HTML is OFF * Forum Code is ON Smilies [quote][i]Originally posted by shadders[/i] [br]Hi, Just spoken to a PCB manufacturer, and they have stated that the minimum hole that they can provide is 0.3mm. The next specification from them is that they need 0.5mm between the hole and copper clearance on an inner layer. On the Technology File - Spacings there is the usual Via to Shape spacing. This does not take into account Shape to Hole spacing on inner layers. So to obtain the Shape to Hole spacing i have to set the Shape to Via spacing to 0.5mm, which provides a larger than 0.5mm spacing to a hole since the Via pad is greater than the hole. I could calculate that all Vias have perhaps 0.2mm extra copper around the hole, and set the space for Via to Shape to be 0.3mm. Is this a reasonable request - for Shape to Hole spacing for inner layers ?. Thanks and regards, Richard. [/quote]   Check here to include your profile signature. Check here to subscribe to this topic.