| Author |
 Topic  |
|
|
mikekehrli
USA
17 Posts |
 Posted - 12 Mar 2015 : 05:02:49
|
Hi,
I've been outputting boards successfully for years. However, I finally got around to using the panelization feature. I made a panel from scratch. It does everything I want, but I can't get the output for the excellon file (*.drl). I have it checked and all of the settings are the same as when I output individual pcbs. But I don't get my "Drill Data - Through Hole.drl" or "Drill Data - Through Hole (Unplated).drl". Everything else outputs as expected, including the gerber file. But this file seems to be suppressed somehow.
Note, all I can see is the instance representations of each board in the panel design. I can't see any holes in it. It's just a block representation of each of the pcbs. Is there a way that the holes got suppressed going into the panel design?
My software version is 17.0.7
I'm probably not giving enough data to resolve this, but I don't know what else would be relevant. Please let me know if you can think of something I might have done to suppress these output files.
mike@fuelsaver-mpg.com
www.fuelsaver-mpg.com |
|
|
edrees
United Kingdom
779 Posts |
Posted - 12 Mar 2015 : 09:33:42
|
Unless you have a good reason to do the panelisation yourself, I would recommend you leave it to your pcb manufacturer. He is in the best position to design your panel to maximise pcb sheet useage and hence offer you the best price.
I remember when I "played" with this panalisation feature that all I saw was the pcb "representations" with little detail. This is to speed up processing in real time.
Have you checked other EPC folders for the missing files? Are they in another "reports" folder? |
 |
|
|
mikekehrli
USA
17 Posts |
Posted - 12 Mar 2015 : 18:47:06
|
Well, that's what I thought too. But for prototypes, they don't panelize. I found I can get a much better price by doing my own panelization. I never do it for production runs, however. Note, in this case I was wanting 5 pcs of 2 different boards of the same size. Prototyping 2 variations of the same board.
Thanks for the tip about other folders. I had already checked the folders near my project, but now I also checked where the libs are kept and the public documents area too. No go. Besides, in the setup for the output, it clearly says where to put them. They just don't show up.
mike@fuelsaver-mpg.com
www.fuelsaver-mpg.com |
|
|
|
mikekehrli
USA
17 Posts |
Posted - 12 Mar 2015 : 18:54:52
|
PS: I use a standard setup for my plots. It's saved. I've used it for years to get correct plots on individual boards. I used those same settings for the panel. Everything worked the same as for individual boards. Except no *.drl files.
mike@fuelsaver-mpg.com
www.fuelsaver-mpg.com |
|
|
|
Iain Wilkie
United Kingdom
1015 Posts |
Posted - 13 Mar 2015 : 09:09:29
|
Mike, I have never used panelisation so cannot help in this instance. However it does sound like a bug. v17 will still be supported so I suggest you email Numberone and ask them to look at it as a matter of urgency for you. They are pretty good at sorting this kind of problem out very quickly.
Iain |
|
|
|
mikekehrli
USA
17 Posts |
|
|
mikekehrli
USA
17 Posts |
Posted - 17 Mar 2015 : 18:29:22
|
I think I have solved this myself. I was playing with plot settings and all of a sudden I'm getting *.drl files. They look like they are correct and complete, although that point is not fully verified yet.
The settings I normally use all worked fine on my panels, except I had to change something on the "Drill Data - Through Hole". I selected that item in the list, then selected the "Settings" tab. On that tab, "Hole Types" are all checked. That's standard on my plots. But for panels, there are 4 more check boxes that were un-checked in my default settings. I checked them all. They are:
Under "Boards":
"Plated Board Outlines"
"Unplated Board Outlines"
Under "Panel"
"Panel Outlines"
"Plot Each PCB Design Contents"
I don't know why any of these would have anything to do with the *.drl files, but checking them made the drill files appear when I executed the plot. So, by trial and error, that's how it's done.
I think this is a minor bug in the panel plotting code, but the above seems to work as a work around.
mike@fuelsaver-mpg.com
www.fuelsaver-mpg.com |
|
|
|
Iain Wilkie
United Kingdom
1015 Posts |
Posted - 17 Mar 2015 : 20:12:05
|
I think the drill files might be associated with the board outline. Unless you specify a board outline in a gerber layer yo must set either plated or unplated board outlines.
Iain |
|
|
|
mikekehrli
USA
17 Posts |
Posted - 18 Mar 2015 : 00:17:32
|
Yes. Could be part of it. But when I unchecked the other 2 boxes (see my last post), and selected both "Board Outlines" boxes, I only got the unplated holes drl file. The plated holes didn't show up until I checked, "Plot Each PCB Design Contents".
Anyway, I think a little look at the code is needed on this at some point. At the very lease, these options should be selected by default, because it isn't at all intuitive that they need to be selected in order to get the drl files to output. I won't have trouble with it anymore because I saved my "panel plotting" settings, and I'll be good to go. But I think that others will run into this.
The whole panel feature is great. Really easy to layout panels. Another wish list item is the ability to automatically put v-grooves into the center of the gaps between boards. May be pretty easy to code. If not, I draw them myself on an unused layer, then later, I re-name the layer to "v-groove.gbr"
mike@fuelsaver-mpg.com
www.fuelsaver-mpg.com |
|
|
| |
Topic |
|
Drill Data (.drl) file not being output for panel