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JoeB
United Kingdom
12 Posts |
 Posted - 14 Sep 2013 : 17:46:22
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Hi
How can I generate Gerbers with the vias covered?
I sent off a design and the vias were covered in solder, not covered in solder resist?!
In the output for top copper resist, i selected to everything (all ticks were ticked).
Is this not right?
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Edited by - JoeB on 14 Sep 2013 23:30:44 |
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Iain Wilkie
United Kingdom
1015 Posts |
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JoeB
United Kingdom
12 Posts |
Posted - 14 Sep 2013 : 23:29:15
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OK, i have done this already.
In my "Top Copper (resist) plot:
To get the vias covered, should the "pads-only" -> "include normal vias" tick boxes be checked or unchecked?
As i want "resist" on the vias, I would say it needs to be checked, but i'm really not sure.
The dialog is not very clear, and the help manual doesn't really help either.
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JoeB
United Kingdom
12 Posts |
Posted - 14 Sep 2013 : 23:34:26
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I think the confusion is the name above the options is "resist/mask"
If its "resist" then the box will need to be checked to add resist to the vias.
If its a "mask" then the box will need to be unchecked as a mask is the inverse, i.e. masked off the bits that do NOT get resist on them.
Numberone need to clarify what this is, a mask or not?
< confused > |
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edrees
United Kingdom
779 Posts |
Posted - 15 Sep 2013 : 15:36:44
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Joe,
If you're not sure, view the resist Gerber you've produced on a 3rd party Gerber viewer, then you can see whether your vias are clear of resist or covered with resist.
Google GC-PreView and/or Pentalogix Viewmate for suitable free viewers.
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Iain Wilkie
United Kingdom
1015 Posts |
Posted - 15 Sep 2013 : 16:41:16
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In the PCB Editor, go to the Design Technology tab and then the Layer Types tab ..... click to NO on the intersection of the Resist row and the via column.
Iain
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JoeB
United Kingdom
12 Posts |
Posted - 16 Sep 2013 : 09:34:19
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With the resist layer (gerber) if the pad is covered in the gerber, does that mean the pad will be covered in resist, or it will be masked from resist, e.g. uncovered (covered with solder)
I.e. is this layer a resist or a stencil ?
This is where im confused!
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edrees
United Kingdom
779 Posts |
Posted - 16 Sep 2013 : 10:05:42
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Joe, - Suggestion!
How about adding a through the hole resistor (or other "test" component) into your design. It's pads will NOT be covered with solder resist.
Re-compile the Gerbers and compare the resist pattern at the through plated hole and your via, then it should be obvious which is which.
It can add to your confusing describing in text which is which as you can view "negative" or "positive" images on the Gerber viewers. Start with something obvious!
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JoeB
United Kingdom
12 Posts |
Posted - 16 Sep 2013 : 10:21:36
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Ok, just tried that.
It appears that the layer is a mask, e.g. if the pad is covered in the resist layer, the pad will NOT get resist sprayed on it.
So, the naming convention of "resist/mask" should probably be "resist mask" !
I need to uncheck the "include vias", so that the vias are covered in resist.
Thanks for all your help. |
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Topic |
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Covered vias