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Kruse
Denmark
28 Posts |
 Posted - 27 May 2010 : 08:50:59
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Now using ver 13. I see there is the same behaviour that I suspect must be incorrect..
I might be me doing things in a inappropiate way so let me explain:
I have 2 capacitors one leaded electrolytic and one SMD X7R. I want these to be placed as close as possible and on each side of the 2 side PCB.
I thus fetch the leaded electrolyt. since I want this on the bottom PCB side, by ticking "mirrored" in the properties dialog.
Then I place the SMD capacitor, right between the pads of the electrolytic. This is perfect possible .. only the spacing warning ring around each pad of the leaded Capacitor doesn't turn red when I obviously violate the spacing. The same goes to DRC it does not catch any error.
The strage thing (for me) is that if the leaded capacitor stays on the Top side as the SMD component I get warned. |
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olga
United Kingdom
107 Posts |
Posted - 30 Jun 2010 : 20:56:22
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If the nets that the two capacitors are on are the same (e.g. one leg of each capacitor goes to 0V, and one to 5V) then when you put them close to each other, there is no error, so nothing gets displayed.
It is only if they are on different nets that you would get the error markers; if this is the case then you should be seeing them on both sides of the board.
I hope this helps,
Best wishes,
Olga. |
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Peter Johnson
United Kingdom
498 Posts |
Posted - 02 Jul 2010 : 15:46:48
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| If you'd like to send an example to <support@numberone.com>, we'll be happy to investigate it. |
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shadders
United Kingdom
224 Posts |
Posted - 09 Aug 2010 : 23:45:53
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Hi,
Not sure if this is similar - i am on V14.01.
I have two components, an IDC connector and a ferrite Bead.
Design Technology is set up to 0.2mm for Shape to Shape on Spacing tab.
On Rules tab, Component to Component Spacing is set to 0.000 top side and bottom side.
Yet for these two components i am getting a Cm-Cm error.
I worked out what it was - the IDC connector had the DOT outside the border of the IDC above pin 1.
The DRC seems to use a Rectangular box that encompasses all of the PCB footprint, hence the small DOT at the right hand end causes a DRC error along the entire length of the IDC at the same distance from the IDC edge despite no Silk screen printed there.
Regards,
Richard.
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DavidM
United Kingdom
458 Posts |
Posted - 16 Aug 2010 : 10:02:59
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You can over-ride the 'default' behaviour of using the bounding box of all shapes and pads, by adding a shape to define the 'placement area' of the component. This is described on p42 of the V13 update notes which you can find here:
http://www.numberone.com/downloads/manuals/V13%20Supplement.pdf
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shadders
United Kingdom
224 Posts |
Posted - 16 Aug 2010 : 15:51:47
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Hi Dave,
Thanks. I must admit i did not read any of the supplements.
Regards,
Richard. |
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Topic |
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Spacing borderwarning.